Power Sequencing Question

[stevenheintz]

I'm developing a circuit for the CFAL12832C-W-B1 OLED display (SH1101A driver) and have a question about the required power sequencing....

Power on Sequencing:
VPP(8V+) needs to wait to come on at least 100ms after the panel has VLogic power - ok, no problem there...

Power down Sequencing:
Then, there is a required(recommended?) power-down sequence, where VPP_8V needs to be removed at least 100ms before VLogic power is removed.

My question is - how important is the power down sequencing? When power is removed from my design - it's fairly abrupt everywhere. It doesn't look like the reference designs have large capacitors to keep VLogic on the display for 100ms longer when power is removed... or am I missing something?

Will I damage the display if I remove power from VPP and VLogic at the same time?

Thanks

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[stevenheintz]

Anybody read these forums?

*poke*

Does anyone monitor these forums?? Still waiting for someone to respond to the above question

Thanks

 

[CF Support2]

Our apologies for the *very* late response.

The recommended power down sequence is just that - recommended. If you can do a controlled power down function, then that will lead a longer life module. Is it possible to damage the module by just killing power? From our working with the modules, it "is" possible. The odds are low, but it can happen.