CFAL25664A Power Sequence

S

sav

New member
Hi There,

I am using the recommended circuit from the datasheet (MIC2290) to derive VPANEL for my CFAL25664A. I note that when MIC2290 is disabled, the VPANEL signal is not 0V but actually just below VLOGIC due to the internal diode of the MIC2290.

Will this satisfy the power sequencing requirements of the OLED device by simply keeping VPANEL below VLOGIC for the required time interval or must VPANEL actually be 0V for this time interval.

Thanks.
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C

CF Support

Administrator
Thank you for your question.

To protect the OLED panel and extend the panel life time, the driver IC power up/down routine should include a delay period between high voltage and low voltage power sources turn on/off.
 
S

stevenheintz

New member
Power down sequence

Just posted this question elsewhere - but how important is the power-down sequencing? If I'm good with recommended power-up sequencing, can I just remove power from VPP and VLogic at the same time? (or would capacitor be required for VLogic to keep it on for an additional 100ms after the main power has been removed?)
 
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