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CFAG240128L Questions

john

New member
I am trying to connect the CFAG240128L graphic LCD to a Atmel AVR uC.

This LCD uses a Toshiba 6963 controller.

1. What does the RV pin do? In the interface description, is says H:Reverse, H:Normal. I am assuming it should say H:Reverse, L:Normal?

2. I am having problems reading the status from the T6963 (I always get 0x00). What I am doing is toggling the CE and RD bits from high to low to high (then reading the DB0-7 pins) while WR, RST, C/D are high, does this sound correct to you? To read the status, do I need to send a command on the DB0-7 bits? The LCD appears to be on, I am able to adjust the contrast with a potentiometer.

3. In terms of the general working of the LCD, this is how I understand it. There are basically 8 pixel by 8 pixel blocks of data that may represent a character from internal CGROM for instance. Knowing this there are (30) 8 pixel by 8 pixel blocks of data horizontally. There are also (16) 8 pixel by 8 pixel blocks of data vertically. The way you address the LCD is via an x and y pointer which will point to a specific 8 pixel by 8 pixel block. Is this thinking correct?

4. The LCD comes with a 8kB external memory. The datasheet recommends the user setup the external memory a certain way. In particular, a 3072B text area, a 3072B graphics area, and a 2048B CGRAM area. The 2048B CGRAM area in this case is user programmable correct? In addition to this CGRAM area, there is another on-chip CGRAM on the 6963 right? This 8k external memory can be setup any way the user wants right?
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I am not directly familiar with this controller, but I will try to answer some items.
1. What does the RV pin do? In the interface description, is says H:Reverse, H:Normal. I am assuming it should say H:Reverse, L:Normal?
Good question. The T6963 data sheet does not show this signal in its pinout. Maybe CFA has implimented some special function in hardware?
2. I am having problems reading the status from the T6963 (I always get 0x00). What I am doing is toggling the CE and RD bits from high to low to high (then reading the DB0-7 pins) while WR, RST, C/D are high, does this sound correct to you? To read the status, do I need to send a command on the DB0-7 bits? The LCD appears to be on, I am able to adjust the contrast with a potentiometer.
Sounds like your status read sequence is wrong. I would keep CE low during the whole function, instead of changing it along with RD. I also presume you are changing your AVR data port to input state before doing the read. A good sequence is:
Put C/D high (I assume RD, WR & RST are already high)
Put AVR data port to input
Put CE low
loop:
Put RD low
Wait at least 150 nS for data availability
Read data bus
Put RD high
Test status bits from the read operation
If STA0 && STA1 not both high, goto loop:
Put CE high
Put AVR port to output
Return
3. In terms of the general working of the LCD, this is how I understand it. There are basically 8 pixel by 8 pixel blocks of data that may represent a character from internal CGROM for instance. Knowing this there are (30) 8 pixel by 8 pixel blocks of data horizontally. There are also (16) 8 pixel by 8 pixel blocks of data vertically. The way you address the LCD is via an x and y pointer which will point to a specific 8 pixel by 8 pixel block. Is this thinking correct?
Seems like this would be true for text mode. In graphics mode, I'd expect the pointer to address a 1x8 pixel block. I could not find any evidence in the T6963 data sheet as to whether the byte is written horizontally (row) or vertically (column). Beyond that I don't have enough knowledge to say more.
4. The LCD comes with a 8kB external memory. The datasheet recommends the user setup the external memory a certain way. In particular, a 3072B text area, a 3072B graphics area, and a 2048B CGRAM area. The 2048B CGRAM area in this case is user programmable correct? In addition to this CGRAM area, there is another on-chip CGRAM on the 6963 right? This 8k external memory can be setup any way the user wants right?
Can't answer this.
 
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