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CFAG12864ATMIV Z Address Problem on reset

Synapsys

New member
Hi,

This is my first post on this forum. I just purchased a CFAG12864ATMIV graphic display. I have everything working with one exception. On power up the Z address appears to be random on both controllers. I started out with a 1K pullup resistor on the RESET pin and then determined that there should be a 10usec delay after VDD before reset is released from VSS. I added a capacitor to ground to keep RESET low for about 20usec but the problem still persists. Once the display powers up in this mode the Z address cannot be changed by command.

Any suggestions on what to do about this problem?

Regards,
Synapsys
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Once the display powers up in this mode the Z address cannot be changed by command.
I wonder what you mean by "in this mode". As for the Z setting, are you saying that the the "Display Start Line" command '11AAAAAA' (page 11 of the data sheet) has no effect? Have you tried connecting the RESET line to an I/O pin, and assert it under program control? It may be that the reset line must be active for much longer, perhaps several milliseconds, and the controllers are not being reset effectively.

Edit: actually the controller spec says 1 uS reset delay, but it also says 200 nS or less rise time, which I sincerely doubt you can achieve using an RC time constant. Use an I/O pin.
 
Last edited:

Synapsys

New member
Hi cosmicvoid,

Thanks for your reply.

Have you tried connecting the RESET line to an I/O pin, and assert it under program control? It may be that the reset line must be active for much longer, perhaps several milliseconds
Thank you for the suggestion. I hooked RESET to an I/O pin and held it low for 1msec. Low and behold the display now works properly:)

Regards,
Synapsys
 
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