CFAF320240F-T-TS SSD2119 GDDRAM set coordinate 0,0 to upper left?

A

Alfix

New member
How can I set the set the coordinate 0,0 to upper left?
Default 0,0 is upper right.

My init ...
write_command_tft(0x0028); // VCOM OTP
write_data_tft(0x0006); // Page 55-56 of SSD2119 datasheet

write_command_tft(0x0000); // start Oscillator
write_data_tft(0x0001); // Page 36 of SSD2119 datasheet

write_command_tft(0x0010); // Sleep mode
write_data_tft(0x0000); // Page 49 of SSD2119 datasheet

write_command_tft(0x0001); // Driver Output Control
write_data_tft(0x32EF); // Page 36-39 of SSD2119 datasheet

write_command_tft(0x0002); // LCD Driving Waveform Control
write_data_tft(0x0600); // Page 40-42 of SSD2119 datasheet

write_command_tft(0x0003); // Power Control 1
write_data_tft(0x6A38); // Page 43-44 of SSD2119 datasheet

write_command_tft(0x0011); // Entry Mode
write_data_tft(0x6870); // Page 50-52 of SSD2119 datasheet

write_command_tft(0X000F); // Gate Scan Position
write_data_tft(0x0000); // Page 49 of SSD2119 datasheet

write_command_tft(0X000B); // Frame Cycle Control
write_data_tft(0x5308); // Page 45 of SSD2119 datasheet

write_command_tft(0x000C); // Power Control 2
write_data_tft(0x0003); // Page 47 of SSD2119 datasheet

write_command_tft(0x000D); // Power Control 3
write_data_tft(0x000A); // Page 48 of SSD2119 datasheet

write_command_tft(0x000E); // Power Control 4
write_data_tft(0x2E00); // Page 48 of SSD2119 datasheet

write_command_tft(0x001E); // Power Control 5
write_data_tft(0x00BE); // Page 53 of SSD2119 datasheet

write_command_tft(0x0025); // Frame Frequency Control
write_data_tft(0x8000); // Page 53 of SSD2119 datasheet

write_command_tft(0x0026); // Analog setting
write_data_tft(0x7800); // Page 54 of SSD2119 datasheet

write_command_tft(0x004E); // Ram Address Set
write_data_tft(0x0000); // Page 58 of SSD2119 datasheet

write_command_tft(0x004F); // Ram Address Set
write_data_tft(0x0000); // Page 58 of SSD2119 datasheet

write_command_tft(0x0012); // Sleep mode
write_data_tft(0x08D9); // Page 49 of SSD2119 datasheet

// Gamma Control (R30h to R3Bh) -- Page 56 of SSD2119 datasheet
write_command_tft(0x0030);
write_data_tft(0x0000);

write_command_tft(0x0031);
write_data_tft(0x0104);

write_command_tft(0x0032);
write_data_tft(0x0100);

write_command_tft(0x0033);
write_data_tft(0x0305);

write_command_tft(0x0034);
write_data_tft(0x0505);

write_command_tft(0x0035);
write_data_tft(0x0305);

write_command_tft(0x0036);
write_data_tft(0x0707);

write_command_tft(0x0037);
write_data_tft(0x0300);

write_command_tft(0x003A);
write_data_tft(0x1200);

write_command_tft(0x003B);
write_data_tft(0x0800);

write_command_tft(0x0007); // Display Control
write_data_tft(0x0033); // Page 45 of SSD2119 datasheet

delay(20);

write_command_tft(0x0022); // RAM data write/read

display_home_tft();

-------------------------


void display_home_tft (void) {

write_command_tft(0x004E); // RAM address set (X-Richtung)
write_data_tft(0x0000); // Page 58 of SSD2119 datasheet
write_command_tft(0x004F); // RAM address set (Y-Richtung)
write_data_tft(0x0000); // Page 58 of SSD2119 datasheet

write_command_tft(0x0044); // Vertical RAM address position
write_data_tft(0xEF00); // Page 57 of SSD2119 datasheet
write_command_tft(0x0045); // Horizontal RAM address position
write_data_tft(0x0000); // Page 57 of SSD2119 datasheet
write_command_tft(0x0046); // Horizontal RAM address position
write_data_tft(0x013F); // Page 57 of SSD2119 datasheet

write_command_tft(0x0022); // RAM data write/read

}
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D

djautoclinic

New member
Flip CFAF320240F-T

Change this init command......
write_command_tft(0x0001); // Driver Output Control
write_data_tft(0x32EF); // Page 36-39 of SSD2119 datasheet

To this.....
write_command_tft(0x0001); // Driver Output Control
write_data_tft(0x72EF); // Page 36-39 of SSD2119 datasheet

This changes IB14 to a 1 and will flip the display left/right. There are a couple ways you can set it with various bits but this will work. See all of the display examples and related control bits on pages 37, 38, and 39 of the SSD2119 Datasheet for the Driver Output Control (R01h) (POR = 3AEFh).

Brian
 
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