Hi!:
Im working with a couple of GLCD, the CFAG240128L-YYH-TZ and the CFAG240128L-STI-TZ.
I will drive these GLCD's with LPC2148 uC, wich has a logic level of 3.3V.
The LPC2148 pins are 5V tolerant (Vpin max = 6V).
Since your GLCD's dont meet the TTL level specifications:
GLCD level: Vih min = 2.8 (?)
uC level: Voh min = 2.9 (at -4mA):
1. Can i use the GLCD without level shifting?
2. Which is the current consumption of I/O pins of the GLCD: I input high max (Iih max)?
3. Please tell me the ways to maximize the noise margin. (IC, pull-up, etc)
4. Any advices to ensure fiability on the interfacing?
Thanks in advance!
Im working with a couple of GLCD, the CFAG240128L-YYH-TZ and the CFAG240128L-STI-TZ.
I will drive these GLCD's with LPC2148 uC, wich has a logic level of 3.3V.
The LPC2148 pins are 5V tolerant (Vpin max = 6V).
Since your GLCD's dont meet the TTL level specifications:
GLCD level: Vih min = 2.8 (?)
uC level: Voh min = 2.9 (at -4mA):
1. Can i use the GLCD without level shifting?
2. Which is the current consumption of I/O pins of the GLCD: I input high max (Iih max)?
3. Please tell me the ways to maximize the noise margin. (IC, pull-up, etc)
4. Any advices to ensure fiability on the interfacing?
Thanks in advance!
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