Thank you CF Mark for your response.
I got good performance by setting the max SPI clock frequency to 10MHz
I do have couple of more questions, would you please review them and provide your response?
In our platform CFA835 is connected via SPI interface to a Linux host using spidev driver, the SPI data ready signal is connected to a GPIO.
I noticed when a command is sent to CFA835, there are data being sent out by CFA835 on MISO while host is transferring data on MOSI.
The data sent out by CFA835 are 0xff, 0x1d, 0xe7, 0x74 ...
1-What is the significance of these data sent out by CFA835, before receiving new command? Considering the response from previous command has been read by host.
After host sends command, it monitors the SPI data ready signal when it becomes active (low), host would try to read data as long as the data ready stays active.
2- I noticed there is always an extra byte at the start of the data CFA835 sends out. The correct response from CFA835 is after the first byte. Why there is an extra byte at the beginning of CFA835 response?
Thanks,
Reza